The present invention relates to a technique for a semiconductor device. More particularly, the present invention relates to a technique effectively applicable to a semiconductor device having a power supply circuit.
A DC-DC converter circuit, which is used as a power supply circuit for driving a CPU (Central Processing Unit) used in, for example, a personal computer or a server, has been required to have a low-voltage, large-current drive capability as well as a small size and a low power consumption. It is necessary that a coil incorporated in the power supply circuit is made smaller in order to achieve the downsizing of the power supply circuit. For its achievement, the increase of the PWM (Pulse Width Modulation) frequency is inevitably required. Also, it is necessary to reduce parasitic capacitance and on-resistance of a power MOSFET serving as a switching element of the power supply circuit in order to achieve the low power consumption. A principal portion of this power supply circuit is provided with a power MOSFET for a switching element and a power MOSFET for a rectifier. For the present, the PWM frequency is in a range of about 200 kHz to 500 kHz. Therefore, power MOSFETs having a vertical structure advantageous to low on-resistance are used as both of the power MOSFETs for the switching element and the rectifier.
Note that the power supply circuit is disclosed in, for example, IEEE xe2x80x9c0.35 xcexcm, 43 xcexcxcexa9cm2, 6 mxcexa9 Power MOSFET to Future Microprocessorxe2x80x9d in 1999 (Virginia University), Electronic Design Dec. 6, 1999 xe2x80x9cMOSFET selection is Key to successful DC-DC conversionxe2x80x9d, and xe2x80x9cDevice Requirements for Future cpu Voltage Regulatorsxe2x80x9d Intel Corporation.
However, the inventors of the present invention found out that the power supply circuit technique described above had problems as follows.
Specifically, in the vertical power MOSFET, due to the structure in which a gate electrode region and a drain electrode region are layered on each other with a thin gate insulating film interposed therebetween, it is difficult to reduce parasitic capacitance between the gate and drain. Therefore, the pulse width becomes narrower in proportion to the further increase of the PWM frequency. Nonetheless, the rise of the pulse is slowed due to the parasitic capacitance, resulting in the increase of switching loss and drive loss. That is, there is a problem that it is impossible to achieve low parasitic capacitance and low on-resistance properties required to realize high power supply efficiency.
In addition, if power MOSFETs having the vertical structure are used as both of the power MOSFETs for a switching element and a rectifier, source electrodes thereof are inevitably connected by the bonding wire, and the problems of the reduction of the power supply efficiency and increase of the noise are caused due to the influence of an inductance component of the bonding wire.
An object of the present invention is to provide a technique capable of improving the power supply efficiency of a power supply circuit.
Another object of the present invention is to provide a technique capable of reducing an inductance component in a power supply circuit.
Another object of the present invention is to provide a technique capable of suppressing or preventing the generation of noise in a power supply circuit.
Another object of the present invention is to provide a technique capable of making a semiconductor device having a power supply circuit smaller in size.
Other objects and novel characteristics of the present invention will be apparent according to the description and the accompanying drawings of this specification.
The outline of the typical one of the inventions disclosed in this application will be described as follows.
Specifically, according to the present invention, a switch in a high side constituting a power supply circuit is constituted of a horizontal field effect transistor, and a switch in a low side is constituted of a vertical field effect transistor.
Also, according to the present invention, a source of the horizontal field effect transistor and a drain of the vertical field effect transistor are joined to a common conductor and are electrically connected to each other.
Also, according to the present invention, a semiconductor device comprises a first terminal for supplying a first potential; a first field effect transistor having a drain connected to the first terminal; a second field effect transistor having a drain electrically connected to a source of the first field effect transistor; and a second terminal for supplying a potential lower than the first potential and to which a source of the second field effect transistor is electrically connected, wherein the first field effect transistor is constituted of a horizontal field effect transistor and the second field effect transistor is constituted of a vertical field effect transistor.
Also, according to the present invention, a semiconductor device comprises a semiconductor region for a source formed on a first surface of a semiconductor chip; a semiconductor region for a drain formed on the first surface; a gate insulating film formed on the first surface between the semiconductor region for a source and the semiconductor region for a drain; a gate electrode formed on the gate insulating film; an insulating film deposited so as to cover the gate electrode on the first surface; an outer terminal for a gate provided on the insulating film and electrically connected to the gate electrode; an outer terminal for a drain provided on the insulating film and electrically connected to the semiconductor region for a drain; an outer terminal for a source formed on a second surface of the semiconductor chip opposite to the first surface; and connection means for electrically connecting the semiconductor region for a source on the first surface to the outer terminal for a source.